This invention relates to semiconductor packaging.
In a conventional lead frame package, a semiconductor die is mounted active side upward on a die attach part of a centrally situated die paddle, and the die is electrically connected to bond sites on peripherally situated leads by wire bonds. The assembly of die and leadframe and wires is then encapsulated with an encapsulant or molding compound to protect the die and wires. In a chip scale lead frame package, interconnection of the package (and, therefore, of the die) with circuitry in the environment in which it is deployed is made by way of the leads, and the encapsulation is carried out in such a way as to leave portions of the leads exposed for interconnection. The leadframe is made from a metal (such as copper) sheet by selective removal of the metal where it is not needed (such as by a patterned mask and etch, for example), leaving the die paddle and the peripheral leads. The number of input/output interconnections is limited by the pitch of the leads, and the lead pitch cannot in practice be made finer than a specified lower limit, owing principally to the thickness of the metal and to limitations imposed by the techniques used to pattern the leadframe.
Finer lead pitch can be obtained in a chip scale package by forming bumped or flat pads, in a so-called bump chip carrier (BCC). The BCC is made by plating thin metal layers onto a sacrificial metal (usually copper) base and then removing the base material after the thin bumps or pads have been formed. The additional steps in the BCC process make this kind of package much more costly to make than a standard leadframe.